De-Processing Lab Engineer (SE1)

Job ID
US-MD-Annapolis Junction
Regular Full-Time
Clearance Level
TS/SCI with Polygraph

Company Overview

Come join the company voted Top Ranked Benefits by The Baltimore Sun in 2014, One of the Best Places to Work 2015-2016 and newly awarded Best Government Contractor Overall in Howard County Maryland for 2016 by the HoCo Chamber of Commerce!


We are located in Columbia Maryland and have over 85 employees. We have a rich military service history with focused subject matter expertise supporting RF SIGINT Collection projects, Hardware / Software Systems Engineering Integration and Testing, and Wireless Network Information Assurance Products and Services.





We're looking for a candidate who can be trained to perform failure analysis sample preparation which will include de-packaging, polishing, plasma etching and using wet chemistry to prepare IC's for scanning electron microscopy. The candidate will use optical and SEM microscopy to inspect sample progress.


Candidates must have:   

  • Experience in systems engineering technologies and methodologies   
  • A Bachelor’s degree in chemical, biological, computer engineering, or a related engineering field.   
  • The capability to perform manual fine detail tweezers work.
  • A current TS\SCI with Polygraph Clearance!!!


Ideal candidates:   

  • Fabrication lab experience   
  • Experience in handling safely handling chemicals and hazardous substances   
  • A penchant for ensuring the safety of lab workers




VS-02-004-no cca

Additional Requirements / Qualifications


  • 6+ years (2 with BS degree/1 with MS degree) in one or more of the following:
    • System engineering of secure command control, communications and intelligence (C3I) systems;
    • Analyzing needs, deriving system-level requirements, and contributing to the design, development, implementation, and maintenance of computer networks and systems or;
    •  Microelectronics engineering, integrated circuit design and integratedcircuit reverse engineering skills


Desired Requirements:


  • ​1+ years of secure systems engineering development, including system security requirements analysis, system security requirements allocation, trade-off analysis, other systems security analyses, and secure system definition and specification development
  • 1+ years experience with Field Programmable Gate Array (FPGA) design and engineering
  • 1+ years experience with Security Content Automation Protocol (SCAP) and Trusted Network Connect (TNC).
  • 1+ years experience with data modeling to include the development and implementation of a data modeling methodology.
  • 1+ years expereince with virtualization technology (e.g. VMware) implementation
  • 1+ years experience in designing and developing user interface features, writing design documents, test plans and test results, and assessing architecture and current hardware limitations.
  • 1+ years in defining and developing comprehensive Java 2EE solutions as part of a Service Oriented Architecture (SOA) using applicable DoDAF standards
  • 1+ years in system engineering for VAO Data Integration, Analysis and Reporting (IA&R) activities to include DoD and IC data standardization efforts as they relate to IA&R


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